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Fig. 2. Block diagram of the Canny edge detection algorithm.

Journal: Engineering, Technology & Applied Science Research

Article Title: Model-based Design of a High-Throughput Canny Edge Detection Accelerator on Zynq-7000 FPGA

doi: 10.48084/etasr.7081

Figure Lengend Snippet: Fig. 2. Block diagram of the Canny edge detection algorithm.

Article Snippet: 14, No. 2, 2024, 13547-13553 13548 www.etasr.com Alhomoud et al.: Model-based Design of a High-Throughput Canny Edge Detection Accelerator on Zynq.. the Canny edge detection algorithm in MATLAB/Simulink and utilizing the HDL Coder to automatically convert it into synthesizable VHDL code.

Techniques: Blocking Assay